1. Field of the Invention
The present invention relates to a synchronous dynamic random access memory (SDRAM), and more particularly to a data communication circuit of SDRAM and a data communication method of a SDRAM, which is adapted for an optical storage medium.
2. Description of Related Art
FIG. 1 is a schematic circuit block diagram showing a prior art data communication circuit of a SDRAM. Referring to FIG. 1, the prior data communication circuit 100 of the SDRAM comprises a plurality of control lines 110, such as /CS, /RAS, /CAS, /WE, and so on, for transmitting control signals to the SDRAM 102. The data communication circuit 100 also comprises address lines 120 and data lines 130. The address lines 120 transmit address signals from the data communication circuit 100 to the SDRAM 102. The data lines 130 transmit data from the data communication circuit 100 to the SDRAM 102. The data lines 130 of the data communication circuit 100 are coupled to the data pins, Q1–Qn, of the SDRAM 102. Generally, each of the data lines 130 of the data communication circuit 100 is coupled to each of the data pins, Q1–Qn, of the SDRAM 102, respectively. The number of the data lines 130 represents the width of the data bus of the data communication circuit 100.
The specification of SDRAM includes X1, X2, X4, X8, X16 and X32. Due to the market demand, the width of the data bus thus is limited. The situation is apparent for low-capacity electronic devices, such as video compact disk systems. For example, a 16-M bite memory usually adapts a 1 M×16 package. It means that a data bus with ×16 width is required. For those low-capacity electronic devices, the selection of the width of the data bus is not flexible due to the package request.